PO100HSTL23A
Dual Differential LVDS/LVPECL/HSTL to LVTTL Translator
12/19/07
FEATURES:
• Patented Technology
• Differential LVDS/LVPECL/HSTL to LVTTL
Translator
• Operating frequency up to 1GHz with 2pf load
• Operating frequency up to 800MHz with 5pf load
• Operating frequency up to 450MHz with 15pf load
• Very low output pin to pin skew < 150ps
• Propagation delay < 1.8ns max with 15pf load
• 2.4V to 3.6V power supply
• Industrial temperature range: –40°C to 85°C
• Available in 8-pin SOIC package
• Available in 8-pin TSSOP package
DESCRIPTION:
Potato Semiconductor’s PO100HSTL23A is
designed for world top performance using
submicron CMOS technology to achieve 1GHz
LVTTL output frequency with less than 1.8ns
propagation delay.
The
PO100HSTL23A
is a low-skew, The small
outline 8 pin package and the low skew design to
make it ideal for applica- tions which require the
translation of a clock or a data signal.
Pin Configuration
Logic Block Diagram
D0
D0
D0
D1
D1
1
2
3
4
8
7
6
5
V
CC
D0
Q0
Q1
D1
GND
D1
LVDS
LVPEC
HSTL
LVTTL
Q1
Q0
Pin Description
Pin
Q0, Q1
D0, D1
D0, D1
V
CC
GND
Function
LVTTL Outputs
Differential
LVDS/LVPECL/HSTL Inputs
Positive Supply
Ground
1
Copyright
© Potato Semiconductor Corporation
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
