PO100HSTL180A
Differential LVDS/LVPECL/HSTL to LVTTL Translator
LVTTL/LVCMOS to Differential HSTL Translator
04/26/09
Driver Switching Characteristics
Symbol
Description
Propagation Delay D to Output pair
Output Enable Time
Output Disable Time
Rise/Fall Time
Output Pin to Pin Skew (Same Package)
Output Skew (Different Package)
Input Frequency
Input Frequency
Test Conditions (1)
CL = 15pF
CL = 15pF
CL = 15pF
0.8V – 2.0V
CL = 15pF, 125MHz
CL = 15pF, 125MHz
CL =15pF
CL = 5pF
Typ
M ax
Unit
t
PD
t
PZH or
t
PZL
t
PHZ or
t
PLZ
tr/tf
tsk(o)
tsk(pp)
fmax
fmax
Notes:
1.4
2.5
2.5
0.8
100
250
500
250
1.65
300
ns
ns
ns
ns
ps
ps
MHz
GHz
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
Test Circuit
Vcc
15pF
to
2pF
Pulse
Generator
D.U.T
50
Ω
15pF
to
2pF
5
Copyright
© Potato Semiconductor Corporation
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
