PRELIMINARY
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Indicates the number of CRC Errors in Linecard to Switch LCS headers
Bits
Description
The total number of detected CRC Errors in Linecard to Switch LCS headers
31:0
3.4.2.20 LCS Processor CP Subport 0 CRC Error Count
Symbol: ELCSP0CT
Address Offset: 00050h
Default Value: 00000000h
Access:
Read and Clear
Indicates the number of CRC Errors in processed CP from Subport 0.
Bits
Description
31:0
The total number of detected CRC Errors in Processed CPs from Subport 0.
3.4.2.21 LCS Processor CP Subport 1 CRC Error Count
Symbol: ELCSP1EC
Address Offset: 00054h
Default Value: 00000000h
Access:
Read and Clear
Indicates the number of CRC Errors in processed CP from Subport1.
Bits
Description
31:0
The total number of detected CRC Errors in Processed CPs from Subport 1.
3.4.2.22 LCS Processor CP Subport 2 CRC Error Count
Symbol: ELCSP2EC
Address Offset: 00058h
Default Value: 00000000h
Access:
Read and Clear
Indicates the number of CRC Errors in processed CP from Subport 2.
Bits
Description
31:0
The total number of detected CRC Errors in Processed CPs from Subport 2.
180
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE