Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Figure 27. Ingress Port Logic
TDM Cell Queues
OC-48c 0
OC-48c 1
OC-48c 2
OC-48c 3
=?
“Send”Table
OC-48c Select
TDM Identifier
0
991
Current TDM Slot Time
The egress side of the port also looks at the TDM table. If the Output Valid bit in the current entry is set,
then the port tells the Scheduler that it expects to receive a TDM cell at some fixed time in the future. This
prevents the Scheduler from trying to schedule a best-effort cell to that port at the same time.
If the Scheduler doesn’t receive the input TDM request bit from the specified input port, then it assumes
that there is no TDM cell ready to be transmitted, and thus any egress port that expected to receive that
cell will now become available for best-effort cell scheduling.
When the TDM cell enters the egress port, it is placed in a separate, 96-entry, egress queue dedicated for
TDM traffic. Whenever this queue is non-empty, the cell at the head of the queue is sent immediately to the
linecard (provided that the Output Scheduler is not frozen).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
57
PMC [ PMC-SIERRA, INC ]
