Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
If a port is operating in OC-192c mode then it will also have U unicast request counters. If a port is
operating in quad OC-48c mode then it will have 4 * U unicast request counters - a separate set of request
counters for each of the OC-48c linecards.
Each port always has four multicast ingress queues.
The number of egress queues is a function of the mode of the port itself, not the other ports: a port in
OC-192c mode will have one queue for each input port and priority, or 4 * 32 = 128 egress queues. A port
in quad OC-48c mode will have four times as many queues, or 512 queues.
Each port always has four multicast egress queues.
The size and depth of all request counters and queues are defined in Section 3.2 “Input Dataslice Queue
Memory Allocation with EPP” on page 162 and Section 3.3 “Output Dataslice Queue Memory Allocation
with EPP” on page 162.
1.3.6 Summary
Every ETT1 port has a number of ingress request counters and queues as well as egress queues. Given
support for 32 ports, four subports per port, and four priorities, then there are up to 512 unicast ingress
queues and four multicast ingress queues, and the same number of egress queues.
At every cell time, the Scheduler arbitrates among all of the ingress queues that are eligible to forward a
cell through the Crossbar. An ingress queue is eligible if it is non-empty and its destination egress queue is
not backpressured. The Scheduler makes its decision using absolute priorities, with multicast requests
having precedence over unicast requests at the same level, as shown in Figure 23.
Figure 23. Scheduler Priorities
Best Effort Traffic
Priority 0 Multicast
Priority 0 Unicast
Priority 1 Multicast
Priority 1 Unicast
Priority 2 Multicast
Priority 2 Unicast
Priority 3 Multicast
Priority 3 Unicast
Highest precedence
Lowest precedence
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PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
