RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
5.4.2.15 AIB Tx Enable
Symbol:
SPORTEN
Address Offset: 0003Ch
Default Value: 00000000h
Access:
Read/Write
This is used to enable the transmitter of the corresponding AIB link.
Bits
Description
AIB Tx Enable. If the corresponding port is not physically present in the system then the
appropriate bit should be set to zero to reduce unwanted electrical noise and to minimize
unwanted effects when the port board is inserted
31:0
5.4.2.16 Flow Control Crossbar Sync
Symbol: FCCSYN
Address Offset: 00040h
Default Value: 00000000h
Access:
Read/Write
NOTE: This register is only used in conjunction with the Enhanced Port Processor. It is not used
with the Port Processor.
The counter is reloaded at reset or whenever a refresh_go occurs. Thus, the counter can be synchronized
between two Scheduler devices. To force the counter to reload, set the Run/Stop bit to 0, write a new count
value to the Synch_period, and then set the run/stop bit to 1. Dual Schedulers should always be refreshed
(synchronized) after this register has been modified.
Bits
Description
Synch_period. This value denotes the period at which OC48 synch pulses will be issued.
31:16 Setting this to the recommended value of 32 means that the OC48_synch bit will be set to 1 for
every one in 32 frames sent to the Port Processor.
15:1
Reserved.
Run/Stop. This bit enables the OC-48 Synch counter. When 0 the counter does not run and is
continuously reloaded with the value in the synch_period field. When this bit is set to 1 the
counter counts down by one for each cell time. When the counter reaches the value one a
synchronization pulse is issued in the scheduler to Port Processor frame on all ports (a bit is set
in the frame).
0
268
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE