NSE-8G™ Standard Product Data Sheet
Preliminary
5
Block Diagram
The NSE-8G is organized as a DS0 granularity space switch. Alternatively, the NSE-8G is
organized as a self aligning (with respect to STS-12 boundaries in TelecomBus mode)
VT1.5/VT2 granularity space switch.
Figure 5 NSE- 8G Block Diagram Showing Functional Blocks
1/2
In-Band
Link
1/2
In-Band
Link
Data
Receive
Transmit
8B/10B
Encoder
(T8TE)
LVDS
Transmitt
er
LVDS
Receiver
(RXLV)
Transmit
Serializer
(PISO)
RP[0]
RN[0]
Recovery 8B/10B
TP[0]
TN[0]
Unit
Decoder
(R8TD)
Controller
(ILC)
Controller
(ILC)
(DRU)
(TXLV)
1/2
In-Band
Link
1/2
In-Band
Link
Data
Receive
Transmit
8B/10B
Encoder
(T8TE)
LVDS
Transmitt
er
LVDS
Receiver
(RXLV)
Transmit
Serializer
(PISO)
RP[1]
RN[1]
Recovery 8B/10B
TP[1]
TN[1]
Unit
Decoder
(R8TD)
Controller
(ILC)
Controller
(ILC)
(DRU)
(TXLV)
1/2
In-Band
Link
1/2
In-Band
Link
Data
Receive
Transmit
8B/10B
Encoder
(T8TE)
LVDS
Transmitt
er
LVDS
Receiver
(RXLV)
Transmit
Serializer
(PISO)
RP[11]
RN[11]
Recovery 8B/10B
TP[11]
TN[11]
Unit
Decoder
(R8TD)
Controller
(ILC)
Controller
(ILC)
(DRU)
(TXLV)
DS0 Crossbar Switch
(DCB)
Tx
Clock
Synthesis
Unit
Ref
RC1FP
CMP
SYSCLK
Microprocessor Interface
JTAG
The R8TD, in combination with the RXLV and DRU receive, decode and align incoming
SBI336/STS-12-equivalent LVDS links. Outputs are provided to the primary switching flow and
to the in-band signaling channel. These provide all analog and digital functions to terminate a
full-duplex 777.6 MHz serial SBI336S or 777.6 MHz serial TelecomBus on LVDS.
A 12 X 12 DS0 Crossbar Switch(DCB) stage switches data and control signals between the 12
ports. The switching instructions are stored in two pages of ram configured as offline and online
allowing the user to modify the offline page.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
17
PMC [ PMC-SIERRA, INC ]
