PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Pin Name Type
Pin
Function
No.
TDO
Tristate W2
The test data output signal (TDO) carries test
data out of the FREEDM-84P672 via the IEEE
P1149.1 test access port. TDO is updated on the
falling edge of TCK. TDO is a tristate output
which is inactive except when scanning of data is
in progress.
Output
TRSTB
Input
Open
V2
The active low test reset signal (TRSTB) provides
an asynchronous FREEDM-84P672 test access
port reset via the IEEE P1149.1 test access port.
TRSTB is an asynchronous input with an integral
pull up resistor.
Note that when TRSTB is not being used, it must
be connected to the RSTB input.
NC1-152
These pins must be left unconnected.
Table 5 – Production Test Interface Signals (31)
Pin Name Type
Pin
No.
Function
TA[0]
TA[1]
TA[2]
TA[3]
TA[4]
TA[5]
TA[6]
TA[7]
TA[8]
TA[9]
TA[10]
TA[11]
Input
G1
G2
F2
G4
E2
D2
B4
D6
B5
D7
B6
D8
The test mode address bus (TA[11:0]) selects
specific registers during production test
(PMCTEST set high) read and write accesses.
In normal operation (PMCTEST set low), these
signals should be grounded.
TA[12]/TR Input
S
B9
The test register select signal (TA[12]/TRS)
selects between normal and test mode register
accesses during production test (PMCTEST set
high). TRS is set high to select test registers
and is set low to select normal registers. In
normal operation (PMCTEST set low), this
signal should be grounded.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
28
PMC [ PMC-SIERRA, INC ]
