RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Pin Name
Type
Input
Pin
No.
R21
Function
RFP8B
The receive frame pulse for 8.192 Mbps H-
MVIP signal (RFP8B) references the
beginning of each frame for links configured
for operation in 8.192 Mbps H-MVIP mode.
RFP8B references the beginning of a frame
for any link configured for 8.192 Mbps H-
MVIP operation. Only links 4m (0?m?7)
may be configured for 8.192 Mbps H-MVIP
operation.
When one or more links are configured for
8.192 Mbps H-MVIP operation, RFP8B is
sampled on the falling edge of RMV8FPC.
When no links are configured for 8.192
Mbps H-MVIP operation, RFP8B is ignored
and should be tied low.
RMV8FPC
Input
P23
The receive 8.192 Mbps H-MVIP frame
pulse clock signal (RMV8FPC) provides the
receive frame pulse clock for links
configured for operation in 8.192 Mbps H-
MVIP mode.
RMV8FPC is used to sample RFP8B.
RMV8FPC is nominally a 50% duty cycle,
clock with a frequency of 4.096 MHz. The
falling edge of RMV8FPC must be aligned
with the falling edge of RMV8DC with no
more than ±10 ns skew.
RMV8FPC is ignored and should be tied low
when no physical links are configured for
operation in 8.192 Mbps H-MVIP mode.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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