RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
RPDRRQW[15:0]:
The receive packet descriptor reference (RPDR) ready queue write bits
(RPDRRQW[15:0]) define bits 17 to 2 of the Receive Packet Descriptor
Reference Ready Queue write pointer. This register is initialised by the host.
The physical write address in the RPDRR queue is the sum of
RPDRRQW[15:0] left shifted by 2 bits with the RQB[31:0] bits in the RMAC
Receive Queue Base register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
179
PMC [ PMC-SIERRA, INC ]
