RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
7BIT:
The least significant stuff enable bit (7BIT) configures the HDLC processor to
stuff the least significant bit of each octet in the corresponding transmit link
(TD[n]). The value of 7BIT to be written to the channel provision RAM, in an
indirect channel write operation, must be set up in this register before
triggering the write. When 7BIT is set high, the least significant bit (last bit of
each octet transmitted) does not contain channel data and is forced to the
value configured by the BIT8 register bit. When 7BIT is set low, the entire
octet contains valid data and BIT8 is ignored. 7BIT reflects the value written
until the completion of a subsequent indirect channel read operation.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
217
PMC [ PMC-SIERRA, INC ]
