RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
TDRRQW[15:0]:
The transmit packet descriptor reference (TPDR) ready queue write bits
(TDRRQW[15:0]) define bits 17 to 2 of the Transmit Packet Descriptor
Reference Ready Queue write pointer. This register is initialised by the host.
The physical write address in the TDRF queue is the sum of TDRRQW[15:0]
left shifted by 2 bits with the TQB[31:0] bits in the TMAC Transmit Queue
Base register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
205
PMC [ PMC-SIERRA, INC ]
