RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
Registers 0x080, 0x0A0, 0x0C0, 0x0E0, 0x100, 0x120, 0x140, 0x160:
Receive High Speed Serial Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
DDSCR
HDSCR
Unused
0
1
X
0
0
0
1
0
R/W
R/W
R/W
R/W
R/W
CNTCELLERR
CELLCRC
PREPEND
USRHDR[1]
USRHDR[0]
These registers configure, on a per-link basis, the format of the cells expected on
the eight RXDn+/- serial links.
USRHDR[1:0]:
The USRHDR[1:0] bits determine the length of the expected User Header
field of the received cells.
USRHDR[1:0] Bytes in User Header
00
01
10
11
4
5
6
Reserved
PREPEND:
The PREPEND bit determines if the User Prepend field is expected to exist in
the received cells. If PREPEND is logic 1, a two byte User Prepend is
expected to follow the System Prepend field.
CELLCRC:
The CELLCRC bit determines whether the entire high speed serial data
structure is expected to be protected by a CRC-8 code word. The PREPEND
bit must be logic 1 for this bit to have effect. If CELLCRC and PREPEND are
logic 1, the second User Prepend byte is expected to contain the CRC-8
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
86
PMC [ PMC-SIERRA, INC ]
