RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
LIST OF FIGURES
FIG. 1 TYPICAL TARGET APPLICATION........................................................... 5
FIG. 2 THREE STAGE MULTIPLEX ARCHITECTURE....................................... 7
FIG. 3 SCI-PHY/ANY-PHY CELL FORMAT....................................................... 32
FIG. 4 HIGH-SPEED SERIAL LINK DATA STRUCTURE ................................. 34
FIG. 5 LOOPBACKS......................................................................................... 38
FIG. 6: CELL DELINEATION STATE DIAGRAM............................................... 42
FIG. 7 MICROPROCESSOR CELL FORMAT................................................... 50
FIG. 8 BOUNDARY SCAN ARCHITECTURE ................................................. 136
FIG. 9 TAP CONTROLLER FINITE STATE MACHINE................................... 138
FIG. 10 UPSTREAM SCI-PHY INTERFACE TIMING ..................................... 144
FIG. 11 UPSTREAM ANY-PHY INTERFACE TIMING..................................... 145
FIG. 12 DOWNSTREAM ANY-PHY INTERFACE POLLING TIMING ............. 146
FIG. 13 DOWNSTREAM ANY-PHY INTERFACE TRANSFER TIMING.......... 146
FIG. 14 MICROPROCESSOR INTERFACE READ TIMING........................... 153
FIG. 15 MICROPROCESSOR INTERFACE WRITE TIMING......................... 155
FIG. 16 RSTB TIMING.................................................................................... 156
FIG. 17 RECEIVE SCI-PHY/ANY-PHY INTERFACE TIMING......................... 157
FIG. 18 TRANSMIT SCI-PHY INTERFACE TIMING....................................... 158
FIG. 19 JTAG PORT INTERFACE TIMING..................................................... 160
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
vii
PMC [ PMC-SIERRA, INC ]
