RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
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APPLICATION EXAMPLES
When designing communication equipment such as access switches,
multiplexers, wireless base stations, and base station controllers the equipment
architect is faced with a common problem: how to efficiently connect a large
number of lower speed ports to a small number of high speed ports? Typically, a
number of line-side ports (analog modems, xDSL modems ATM PHYs, or RF
modems) are terminated on each line card. Numerous line cards are then
slotted into one or more shelves and backplane traces or inter-shelf cables are
used to connect the line cards to a centralized (often 1:1 protected) common
card, hereafter referred to as the core card. The core card normally includes one
or more high speed WAN up-link ports that transport traffic to and from a high
speed broadband network.
A block diagram of a 1:1 redundant system is shown in Fig. 1.
Fig. 1 Typical Target Application
Modem
Line Card #1
or PHY
Policing
OA&M
Buffering
Discard
S/UNI-
WAN
S/UNI-
Modem
or PHY
VORTEX
OA&M
OA&M
up-link
Scheduling
DUPLEX
Modem
or PHY
WAN Card
Policing
OA&M
Buffering
Discard
S/UNI-
Modem
or PHY
Line Card #N
WAN
VORTEX
up-link
Scheduling
S/UNI-
Modem
or PHY
DUPLEX
WAN Card
Modem
or PHY
In this type of equipment the majority (perhaps all) user traffic goes from WAN
port to line port, or from line port to WAN port. Although the individual ports on
the line cards are often relatively low speed interfaces such as T1, E1, or xDSL,
there may be many ports per line card and many line cards per system, resulting
in hundreds or even thousands of lines terminating on a single WAN up-link. In
the upstream direction (from line card to WAN up-link), the equipment must have
capacity to buffer and intelligently manage bursts of upstream traffic
simultaneously from numerous line cards.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
5
PMC [ PMC-SIERRA, INC ]
