欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM7350-PI 参数 Datasheet PDF下载

PM7350-PI图片预览
型号: PM7350-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 双串行链路物理层复用器 [DUAL SERIAL LINK PHY MULTIPLEXER]
分类和应用: 复用器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 241 页 / 1939 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM7350-PI的Datasheet PDF文件第133页浏览型号PM7350-PI的Datasheet PDF文件第134页浏览型号PM7350-PI的Datasheet PDF文件第135页浏览型号PM7350-PI的Datasheet PDF文件第136页浏览型号PM7350-PI的Datasheet PDF文件第138页浏览型号PM7350-PI的Datasheet PDF文件第139页浏览型号PM7350-PI的Datasheet PDF文件第140页浏览型号PM7350-PI的Datasheet PDF文件第141页  
RELEASED  
PM7350 S/UNI-DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 5  
DUAL SERIAL LINK PHY MULTIPLEXER  
Register 0x24: Microprocessor Extract FIFO Ready  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Unused  
Unused  
Unused  
Unused  
Unused  
X
X
X
X
X
X
X
X
Unused  
R
R
EXTRDY[1]  
EXTRDY[0]  
EXTRDY[1:0]:  
The EXTRDY[1:0] bits provide the ready status of the Extract FIFOs. A logic 1  
in a EXTRDY[0] bit indicates that the Extract FIFO associated with RXD1+/-  
as at least one cell available for reading. A logic 1 in a EXTRDY[1] bit  
indicates that the Extract FIFO associated with RXD2+/- as at least one cell  
available for reading.  
Note that the EXTRDY bit for the FIFO currently being read will always return  
a logic 0.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
125  
 复制成功!