RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x19, 0x1B:
RXD1, RXD2 Receive Bit Oriented Code Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
IDLEI
BOCI
X
X
X
X
X
X
X
X
BOC[5]
BOC[4]
BOC[3]
BOC[2]
BOC[1]
BOC[0]
BOC[5:0]:
The BOC[5:0] bits indicate the current state value of the received bit-oriented
code. The value is updated when the BOC has been a valid code 8 out of 10
or 4 out of 5 times, as selected by the AVC bit of the Bit Oriented Code
Receiver Enable register. These bits are set to all ones (111111) if no valid
code has been detected. An update is accompanied by a logic 1 in the BOCI
bit.
IDLEI:
The IDLEI bit position indicates the detection of a transition from a valid BOC
to idle or invalidated state code value of 111111. A logic 1 in the IDLEI bit
position indicates that a transition from a valid BOC to idle or invalid code has
generated an interrupt; a logic 0 in the IDLEI bit position indicates that no
transition from a valid BOC to idle code has been detected. IDLEI will also set
when no code is currently validated. Note that failure to meet the 8 of 10 (or
4 of 5) persistency criteria, either due to bit errors or a change to a new code,
does result in IDLEI being set. IDLEI is cleared to logic 0 when the register is
read.
BOCI:
The BOCI bit position indicates the detection of a valid BOC. BOCI becomes
logic 1 when BOC[5:0] changes from the transition or IDLE code value of
111111. BOCI is cleared to logic 0 when the register is read.
BOCI will not be set at the transition to a validated IDLE code.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
117
PMC [ PMC-SIERRA, INC ]
