RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x0B: Configuration Pins Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
SCIANYV
OBUS8V
X
X
X
X
X
X
X
X
R
R
R
R
R
R
R
OANYPHYV
OMASTERV
IBUS8V
IANYPHYV
IMASTERV
The Configuration Pins Status Register reflects the value of the S/UNI-DUPLEX
input pins used to configure the Clocked Serial Data and the SCI-PHY/Any-PHY
interfaces. The IMASTERV, IANYPHYV, IBUS8V, OMASTERV, OANYPHYV,
OBUS8V values are only meaningful when the SCIANY pin is high.
IMASTERV:
When IMASTERV is high, the SCI-PHY/Any-PHY interface input port is
configured as a bus master. When IMASTERV is low the, input port is
configured as a bus slave.
IANYPHYV:
When IANYPHYV is high, the SCI-PHY/Any-PHY interface input port
complies with the Any-PHY protocol. When IANYPHYV is low the, input port
complies with the SCI-PHY/Utopia protocol.
IBUS8V:
When IBUS8V is high, the SCI-PHY/Any-PHY interface input port is eight bit
wide. When IBUS8V is low, the SCI-PHY/Any-PHY interface input port is
sixteen bit wide.
OMASTERV:
When OMASTERV is high, the SCI-PHY/Any-PHY interface output port is
configured as a bus master. When OMASTERV is low the, input port is
configured as a bus slave.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
103
PMC [ PMC-SIERRA, INC ]
