S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x21C: RIPP RX Link Interrupt Enable Register
Bit
15:11
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
RESERVED
Default
0
0
0
0
0
0
0
0
0
0
0
0
10
9
8
7
6
5
4
3
2
1
0
RX_ACTIVE_INT_EN
IDLE_CELL_INT_EN
FE_TX_UNUSABLE_INT_EN
DIFF_DELAY_INT_EN
LODS_OVERRUN_INT_EN
LODS_UNDERRUN_INT_EN
LCD_INT_EN
LIF_INT_EN
INVALID_ICP_INT_EN
RX_TIMEOUT_INT_EN
UNUSED
The above enable bits provide a global enable for the corresponding Rx link interrupts. If an
interrupt enable bit is not set, the respective interrupt cannot cause an entry to be written to the
RIPP Interrupt FIFO for any RX link in any group (although the status returned by read_event
may be set) for all links. If a bit is set, the individual Rx Link Interrupt enable is used.
0 – Disable group link interrupt for all links.
1 – Use individual link interrupt enable for each link.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
190
PMC [ PMC-SIERRA, INC ]
