PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
The S/UNI-QJET also supports diagnostic options which allow it to insert, when
appropriate for the transmit framing format, parity or path parity errors, F-bit
framing errors, M-bit framing errors, invalid X or P-bits, line code violations,
all-zeros, AIS, Remote Alarm Indications, and Remote End Alarms.
The S/UNI-QJET provides cell delineation for ATM cells using the PLCP framing
format, or by using the header check sequence octet in the ATM cell header as
specified by ITU-T Recommendation I.432. DS1, DS3, E1 and E3 based PLCP
frame formats can be processed. Non-PLCP-based cell delineation is
accomplished with either bit, nibble, or byte-wide search algorithms, depending
on the line interface used. An interface consistent with the generic physical
interface defined by ITU-T Recommendation I.432 is provided for arbitrary rates
up to 52 Mbit/s. This interface is used to provide physical layer support for
transmission systems that do not have an associated PLCP sublayer, or to
provide an efficient means of directly mapping ATM cells to existing transmission
system formats (such as DS3 and DS1).
In the PLCP receive direction, framing, path overhead extraction and cell
extraction is provided. BIP-8 error events, frame octet error events and far end
block error events are accumulated.
In the PLCP transmit direction, the S/UNI-QJET provides overhead insertion
using inputs or internal registers, DS3 nibble and E3 byte stuffing, automatic BIP-
8 octet generation and insertion and automatic far end block error insertion.
Diagnostic features for BIP-8 error, framing error and far end block error insertion
are also supported.
In the cell receive path, idle cells may be dropped according to a programmable
filter. By default, incoming cells with single bit HCS errors are corrected and
written to the FIFO buffer. Optionally, cells can be dropped upon detection of a
HCS error. Cell delineation may optionally be disabled to allow passing of all
cells, regardless of cell delineation status. The ATM cell payloads are optionally
descrambled. ATM cell headers may optionally be descrambled (for use with
PPP packets). Assigned cells containing no detectable HCS errors are written to
a FIFO buffer. Cells data is read from the FIFO using a synchronous 50 MHz 8-
TM
bit wide or 16-bit wide SCI-PHY and Utopia Level 2 compatible interface. Cell
data parity is also provided. Counts of error-free assigned cells, and cells
containing HCS errors are accumulated independently for performance
monitoring purposes.
In the cell transmit path, cell data is written to a FIFO buffer using a synchronous
TM
50 MHz 8-bit wide or 16-bit wide SCI-PHY compatible interface. Cell data
parity is also examined for errors. Idle cells are automatically inserted when the
FIFO contains less than one full cell. HCS generation, cell payload scrambling,
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