PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 04FH, 14FH, 24FH and 34FH: PMON Line Code Violation Count
MSB
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
LCV[12]
LCV[11]
LCV[10]
LCV[9]
X
X
X
X
X
X
X
X
R
R
R
R
R
LCV[8]
These registers indicate the number of LCV error events that occurred during the
previous accumulation interval. An LCV event is defined as the occurrence of a
Bipolar Violation or Excessive Zeros (>7 consecutives zeros for T1 B8ZS, >15
consecutive zeros for T1 AMI, or >3 consecutive zeros for E1 AMI or E1 HDB3).
The counting of Excessive Zeros can be disabled by the BPV bit of the Receive
Interface Configuration register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
166
PMC [ PMC-SIERRA, INC ]
