PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
• Filler cells received
• User cells transmitted
• Filler cells transmitted
TC Features
• Performs cell delineation on all links.
• Performs receive cell Header Error Check (HEC) checking and transmit cell
HEC generation.
• Optionally supports receive cell payload unscrambling and transmit cell
payload scrambling.
• Provides TC layer statistics counts and alarms for MIB support.
Interface Support
•
Supports 8 individual serial T1, E1 or unchannelized links via a 2-pin clock
and data interface.
• Supports ATM over fractional T1/E1 by providing the capability to select any
DS0 timeslots that are active in a link.
• Serial link interface supports both independent transmit clock (ITC) and
common transmit clock (CTC) options.
• Interfaces to a 1M x 16 SDRAM for 279 msec of T1, 226 msec of E1
differential delay tolerance through a 16-bit SDRAM interface.
• Provides a 16-bit microprocessor bus interface for configuration and Link and
Unit Management.
• ATM receive interface supports 8- and 16-bit UTOPIA L2 or Any-PHY cell
interfaces at clock rates up to 52 MHz.
• Any-PHY receive slave appears as a single device. The PHY-ID of each cell is
identified in the in-band address.
• UTOPIA L2 receive slave appears as a 31 port multi-PHY.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
5
PMC [ PMC-SIERRA, INC ]
