S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
VCC4 is a connection end-point, therefore an end-to-end VCC-RDI cell is generated (assuming
the AUTO_RDI bit is logic 1 in the VC Table) within 0.5 seconds of noticing that the VPC
connection is in segment AIS alarm. VCC4 will continue to generate end-to-end VCC-RDI cells
at a rate of one per second (nominally) while the VPC connection is in segment AIS alarm (i.e the
AIS_segment alarm bit is asserted for the VPC connection).
VCC5 is a segment end-point and a connection end-point, therefore a segment VCC-RDI cell and
an end-to-end VCC-RDI cell are generated (assuming the AUTO_RDI bit is logic 1 in the VC
Table) within 0.5 seconds of noticing that the VPC connection is in segment AIS alarm. VCC5
will continue to generate segment VCC-RDI and end-to-end VCC-RDI cells at a rate of one per
second (nominally) while the VPC connection is in segment AIS alarm (i.e. the
AIS_segment_alarm bit is set).
Figure 17 Termination of F4 Segment End-Point Connection
F4 (VPC)
VPC-AIS-Seg
VPC-RDI-Seg
(Only generated if APS is not available)
VPC-AIS-EtE
Figure 17 above illustrates the scenario where a VPC segment is being terminated at the S/UNI-
ATLAS-3200. In this case, because only a segment end-point is defined, it is assumed that the
VCCs are not switched out of the VPC (because the VPC end-to-end point is not provisioned).
To enable this scenario, the VPC Pointer Active bit would be set to logic 0 in the Linkage Table
entry, and the connection would be configured as a segment end-point. A segment VPC-AIS cell
is received and terminated. Within 0.5 seconds of receiving the segment VPC-AIS cell, a
segment VPC-RDI cell is generated (assuming the AUTO_RDI bit is logic 1 in the VC Table). As
a programmable option, an end-to-end VPC-AIS can be generated if end-to-end AIS is not
already being received. This per-PHY configurable option would normally only be enabled if
APS is not available. The APSx register bit (where x is 0-47) determines whether or not PHYx
has protection switching available. If the APSx register bit is logic 0, an end-to-end VPC-AIS
cell will be generated within 0.5 seconds of entering the VPC Segment AIS alarm condition and
once per second (nominally) thereafter until the VPC Segment AIS alarm condition is exited.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
112
PMC [ PMC-SIERRA, INC ]
