RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Register 0x82220: A1SP Idle Detection Configuration Table
This table contains the idle detection configuration for the A1SP N block which
contains 8 lines The configuration for each line is composed of a 2 bit field
(IDLE_CONFIG) and therefore the register contains the configuration for 8 lines.
The structure of the table is shown below.
ADDRESS
A1SP
LINE Configuration
0x82220
0
IDLE_CFG[7:0]
Bit
Type
Function
Default
15:14
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IDLE_CFG_7
IDLE_CFG_6
IDLE_CFG_5
IDLE_CFG_ 4
IDLE_CFG_ 3
IDLE_CFG_ 2
IDLE_CFG_1
IDLE_CFG_0
X
X
X
X
X
X
X
X
13:12
11:10
9:8
7:6
5:4
3:2
1:0
IDLE_CFG_n
This two bit field defines the idle detection mode. There are four possible
modes: idle detection disabled, processor controlled activation/deactivation
of channels, automatic activation/deactivation of channels using CAS
matching, and automatic activation/deactivation of channels using pattern
matching.
00: Idle Detection Disabled
01: Processor
10: Automatic, CAS Matching
11: Automatic, Pattern Matching
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