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PM73123-PI 参数 Datasheet PDF下载

PM73123-PI图片预览
型号: PM73123-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 8 LINK CES / DBCES AAL1 SAR [8 LINK CES/DBCES AAL1 SAR]
分类和应用:
文件页数/大小: 364 页 / 2908 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM73123 AAL1GATOR-8  
DATASHEET  
PMC-2000097  
ISSUE 2  
8 LINK CES/DBCES AAL1 SAR  
10.4.1 R_OAM_QUEUE_TBL  
Organization: 2 words  
Base address within A1SP: 8000h  
Index: 1h  
Type: Read/Write  
Function: OAM cells received from the ATM side are stored in a FIFO queue in  
the memory. Head and tail pointers are used to keep track of the read and write  
locations of the OAM cell buffers. There are 256 cell buffers in the OAM receive  
queue. Of these 256 cell buffers, 255 are usable. The 256th buffer is used to  
detect a full queue as follows:  
When the queue is empty, OAM_HEAD = OAM_TAIL = N. When a cell is  
received, the cell is written into the buffer at index (OAM_TAIL + 1) mod 256, and  
OAM_TAIL is replaced with (OAM_TAIL + 1) mod 256. When the processor  
receives an interrupt, it reads the cell at the buffer index (OAM_HEAD + 1) mod  
256. After completing the read, it sets OAM_HEAD to (OAM_HEAD + 1) mod  
256. This process is continued until OAM_HEAD = OAM_TAIL, at which time the  
OAM receive queue is empty. The receive OAM interrupt can be cleared by  
asserting the CLR_RX_OAM_LATCH bit in the CMD_REG.  
If an OAM cell arrived between the time the OAM_TAIL was last read and  
CLR_RX_OAM_LATCH was asserted, this OAM cell’s arrival can be detected  
within the interrupt service routine by re-reading OAM_TAIL after  
CLR_RX_OAM_LATCH was asserted.  
OAM Queue Format  
Offset  
Name  
OAM_HEAD  
OAM_TAIL  
Description  
0
1
Head pointer  
Tail pointer  
OAM_HEAD Word Format  
Field(Bits)  
Description  
OAM_HEAD  
(7:0)  
The microprocessor should increment to the next  
cell location when it reads a cell. Initialize to 0.  
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL  
203  
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