RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
This section lists all the memory mapped registers and defines the bit
fields of each register.
10.1 Initialization
The memory must be initialized to 0 (unless otherwise indicated) before the
A1SP software reset is released, but the global software reset must be cleared
before writes to memory can take place. A number of data structures used by the
device in reserved areas depends on this initialization.
Notes:
• All ports marked as “Reserved” must be initialized to 0 at initial setup.
Software modifications to these locations after setup will cause incorrect
operation.
• All read/write port bits marked “Not used” must be written with the value 0 to
maintain software compatibility with future versions.
• All read-only port bits marked “Not used” are driven with a 0 and should be
masked off by the software to maintain compatibility with future versions.
•
10.2 A1SP and Line Configuration Structures
Table 12 A1SP and Line Configuration Structures Summary
Note the addresses listed below are the offsets within the A1SP address space.
Addr
Name
R/W Org
Size
Description
0001h
HS_LIN_REG
R/W 1 word 2 bytes The High Speed
Line Register
provides overall
mode information.
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