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PM73123-PI 参数 Datasheet PDF下载

PM73123-PI图片预览
型号: PM73123-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 8 LINK CES / DBCES AAL1 SAR [8 LINK CES/DBCES AAL1 SAR]
分类和应用:
文件页数/大小: 364 页 / 2908 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM73123 AAL1GATOR-8  
DATASHEET  
PMC-2000097  
ISSUE 2  
8 LINK CES/DBCES AAL1 SAR  
2. If the SN is valid and in sequence with the last valid, in sequence SN, then a  
misinserted cell is detected and the stored cell is dropped. The RALP returns  
to the SYNC state and stores the new cell.  
3. If the SN is valid and the SN is in sequence with the SN of the previous cell,  
the RALP assumes cells were lost; it inserts a number of dummy cells  
identical to the number of lost cells, accepts the second copy of stored cell  
and returns to SYNC. If the number of lost cells is greater than  
MAX_INSERT, then no cells are inserted and a forced underrun occurs. If an  
underrun occurred when cells are lost, no cells are inserted unless bit  
integrity through underrun is enabled.  
4. If the received SN is valid and the SN has a value equal to SN + 2 with  
respect to the last SN received in sequence, then the stored cell is accepted,  
the new cell is stored and the RALP returns to the SYNC state.  
5. And finally, if the SN is valid but does not meet any of the previous criteria,  
then the stored cell is dropped, the new cell is stored and the RALP enters  
the OUT_OF_SYNC state.  
See Figure 36 on page 114 for the flow of the “Robust SN Algorithm”.  
Anytime a cell is dropped, the R_DROPPED_CELLS counter is incremented  
and the SN_CELL_DROP sticky bit is set. Anytime a cell is detected lost, the  
R_LOST_CELLS counter is incremented by the number of lost cells. Anytime  
the SN state machine transitions from the SYNC state to the  
OUT_OF_SEQUENCE state, the R_SEQUENCE_ERR counter is incremented.  
Anytime a misinserted cell is detected the R_MISINSERTED counter is  
incremented. In all these cases the RCV_STAT_FIFO will be written with the  
error that occurred and the queue number for which the error occurred, if the  
corresponding mask bit is not set or this is not the first unmasked sticky bit to be  
set for this queue since the sticky bit register was last cleared.  
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL  
113  
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