PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
Field (Bits)
Description
R_CDVT
(7:0)
Receive Cell Delay Variation Tolerance (R_CDVT) is a constant and is
programmed by the microprocessor during initialization. It is used by the
RFTC after the receipt of the first cell after an underrun. In T1 SDF-MF, E1_
WITH_T1_SIG, or SDF-FR mode, the R_CDVT is expressed as the number
of multiframes in bits 7:5 and the number of frames in bits 4:0. In E1 and all
other T1 modes, R_CDVT is the number of frames. In unstructured
applications, the number of frames refers to the number of 256-bit increments.
For T1 unstructured modes, this is equivalent to the number of 165.8 µs
periods.
R_STATE_1 Word Format
NOTE: This word is read-only and is maintained by the RALP.
Field (Bits)
Description
Reserved (FRC_UNDRN)
(15)
Initialize to 0 to maintain future software compatibility.
Reserved (SNCRCST)
(14)
Initialize to 0 to maintain future software compatibility.
Initialize to 0 to maintain future software compatibility.
Initialize to 0 to maintain future software compatibility.
Initialize to 0 to maintain future software compatibility.
Driven with a 0. Mask on reads to maintain future software compatibility.
Pointer to the frame to which the cell receiver is writing.
Reserved (PTRMMST)
(13)
Reserved (FNDPTR)
(12)
Reserved (FNDFRSTPTR)
(11)
Not used
(10:9)
R_WRITE_PTR
(8:0)
R_LINE_STATE Word Format
NOTE: This word is read-only after initialization and is maintained by the RALP and
RFTC.
Field (Bits)
Description
R_UNDERRUN
(15)
Indicates that this queue is currently in underrun. Initialize to 1. Not used
in UDF-HS mode.
R_RESUME
(14)
Indicates that this queue is currently in resume state. Initialize to 0. Not
used in UDF-HS mode.
R_SIG_RESUME
(13)
Indicates that this queue is currently in signal resume state. Initialize to 0.
Not used in UDF-HS mode.
ꢀꢄꢅ
PMC [ PMC-SIERRA, INC ]
