PMC-Sierra, Inc.
PM6541 E1XC-EVBD
TELECOM STANDARD PRODUCT
PMC-930917
ISSUE 1
E1XC EVALUATION DAUGHTERBOARD
2 FUNCTIONAL DESCRIPTION
2.1
Block Diagram
DIP Sw.
Osc
Clock/PLL
Clock Hdr
Osc
E1XC
East
Decode
Logic
Headers
E1XC
West
Osc
Figure 1: Block Diagram
2.2
BusTransceivers
Bus transceivers are provided at the connector interface to prevent excessive
loading of the 68HC11 on the EVMB evaluation motherboard. In addition they
provide some measure of isolation for the daughterboard and protection for other
external signals such as the EXTCLK and EXTFP inputs.
2
PMC [ PMC-SIERRA, INC ]
