PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Function
Pin Name
Type
Pin
No.
T28
T29
The POS-PHY transmit word modulo (RMOD[1:0]) bus
indicates the size of the current word when configured for packet
mode. During a packet transfer, every word on RDAT[31:0]
must contain four valid bytes of packet data except at the end of
the packet where the word is composed of 1, 2, 3, or 4 valid
bytes. The number of valid bytes in this last word is specified by
RMOD[1:0].
RMOD[1]
RMOD[0]
Output
RMOD[1:0] = “00”
RMOD[1:0] = “01”
RMOD[1:0] = “10”
RMOD[1:0] = “11”
RDAT[31:0] valid
RDAT[31:8] valid
RDAT[31:16] valid
RDAT[31:24] valid
RMOD[1:0] is considered valid only when RVAL is asserted.
RMOD[1:0] is only used for POS operation and is updated on
the rising edge of RFCLK.
R29
The POS-PHY receive start of transfer (RSX) signal is used to
indicate the start of a packet transfer. When RSX is high, the
channel number being transferred is given on RDAT[31:0].
RSX
Output
RSX is only used for POS operation and is updated on the rising
edge of RFCLK.
Input
B18
B18
The UTOPIA transmit FIFO write clock (TFCLK) signal is used
to write ATM cells to the transmit FIFO.
TFCLK
TFCLK is expected to cycle at a 104 MHz rate.
TFCLK
Input
The POS-PHY transmit FIFO write clock (TFCLK) signal is
used to write packet data into the 256 byte packet FIFO.
(continued)
TFCLK is expected to cycle at a 104 MHz rate.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
32