PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 077AH: TXSDQ FIFO Indirect Data and Buffer Available Thresholds
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DT[7]
DT[6]
DT[5]
DT[4]
DT[3]
DT[2]
DT[1]
DT[0]
Unused
Unused
Unused
BT[4]
0
0
0
0
0
0
1
1
X
X
X
0
0
0
1
1
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
R/W
R/W
R/W
R/W
R/W
Bit 3
BT[3]
Bit 2
BT[2]
Bit 1
BT[1]
Bit 0
BT[0]
This register is used to set the Data and Buffer Available Thresholds for a FIFO. These
thresholds are explained in the Operations Section. A FIFO does not need to be enabled to set
this threshold. In order to change a value for a FIFO, the user should first disable it, write in the
new value, and enable it again.
BT[4:0]:
These bits specify the Buffer Available threshold for the FIFO specified in PHYID[5:0] bits in
the TXSDQ FIFO Indirect Address register. When this threshold is being set, these bits are
written to by the user, and when this threshold is being read, these bits hold the previously
configured data. The threshold is equal to BT[4:0] + 1.
This threshold is set in 16 byte Blocks. This threshold can never be greater than the size of
the FIFO being configured, and the absolute maximum value is BT[4:0] +1 = 32. This number
should be a standard fraction of the FIFO size in blocks. In the case of ATM FIFOs, this
number should be et to a value of BT[4:0] = 3 since ATM cells are 4 bytes in size.
DT[7:0]:
These bits specify the Data Available threshold for the FIFO selected by the TXSDQ FIFO
Indirect Address register PHYID[5:0] bits. When this threshold is being set, these bits are
written to by the user, and when this threshold is being read, these bits hold the previously
configured data. The threshold is equal to DT[7:0] + 1.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
358
PMC [ PMC-SIERRA, INC ]
