PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 074AH: RCFP Packet/Cell Counter (LSB)
Bit
Type
Function
Default
Bit 15
to
R
RP_RC[15:0]
XXXX
Bit 0
Register 074BH: RCFP Receive Packet/ATM Cell Counter (MSB)
Bit
Type
Function
Default
Bit 15
to
R
RP_RC[31:16]
XXXX
Bit 0
RP_RC[31:0]:
When POS mode is selected, the RP_RC[31:0] bits indicate the number of received good
packets passed to the FIFO interface during the last accumulation interval.
When ATM mode is selected, the RP_RC[31:0] bits indicate the number of received ATM cells
and passed to the FIFO interface in the last accumulation interval.
A write to any one of the RCFP performance monitor Counter registers loads the registers
with the current counter value and resets the internal 32 bit counter to 1 or 0. The counter
reset value is dependent on if there was a count event during the transfer of the count to the
RCFP performance monitor Counter registers. The counter should be polled regularly to
avoid saturating.
To allow for synchronization update with all other blocks, register 0000H can be written to
initiate a global performance counter update.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
320
PMC [ PMC-SIERRA, INC ]
