PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0747H: RCFP Receive Byte/Idle Cell Counter (LSB)
Bit
Type
Function
Default
Bit 15
to
R
RBY_IC[15:0]
XXXX
Bit 0
Register 0748H: RCFP Receive Byte/Idle Cell Counter
Bit
Type
Function
Default
Bit 15
to
R
RBY_IC[31:16]
XXXX
Bit 0
Register 0749H: RCFP Receive Byte/Idle Cell Counter (MSB)
Bit
Type
Function
Default
Bit 15
to
R
Unused
XXXX
Bit 8
Bit 7
to
R
RBY_IC[39:32]
XXXX
Bit 0
RBY_IC[39:0]:
When POS mode is selected, the RBY_IC[39:0] bits indicate the number of bytes received
within POS frames during the last accumulation interval. The byte counts include all user
payload bytes, FCS bytes, and abort bytes. Inclusion of stuffed bytes in the count is
controlled by the RBY_MODE register bit. HDLC flags are not counted.
When ATM mode is selected, the RBY_IC[39:0] bits indicate the number of Idle cells received
and passed to the FIFO interface in the last accumulation interval.
A write to any one of the RCFP performance monitor counter registers loads the registers
with the current counter value and resets the internal 40 bit counter to 1 or 0. The counter
reset value is dependent on if there was a count event during the transfer of the count to
RCFP performance monitor Counter registers. The counter should be polled regularly to
avoid saturating.
To allow for synchronization update with all other blocks, register 0000H can be written to
initiate a global performance counter update.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
319
PMC [ PMC-SIERRA, INC ]
