PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
CLP:
The CLP bit contains the pattern to match in the eighth bit of the fourth octet of the 53-octet
cell, in conjunction with the Idle Cell Header and Mask register bit. The IDLEPASS bit in the
RCFP Configuration Register must be set to logic 0 to enable dropping of cells matching this
pattern.
PTI[2:0]:
The PTI[2:0] bits contain the pattern to match in the fifth, sixth, and seventh bits of the fourth
octet of the 53-octet cell, in conjunction with the Idle Cell Header and Mask register bits. The
IDLEPASS bit in the RCFP Configuration Register must be set to logic 0 to enable dropping
of cells matching this pattern.
GFC[3:0]:
The GFC[3:0] bits contain the pattern to match in the first, second, third, and fourth bits of the
first octet of the 53-octet cell, in conjunction with the Idle Cell Header and Mask register bits.
The IDLEPASS bit in the RCFP Configuration Register must be set to logic 0 to enable
dropping of cells matching this pattern.
Note that an all-zeros pattern must be present in the VPI and VCI fields of the Idle cell.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
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