PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
STRIP_SEL:
The frame check sequence stripping bit (STRIP_SEL) selects the CRC stripping mode of the
RCFP. When STRIP_SEL is logic 1, CRC stripping is enabled. When STRIP_SEL is logic 0,
CRC stripping is disabled. Note that CRC_SEL[1:0] must not equal "00", (no CRC) for
stripping to be enabled. When stripping is enabled the received packet FCS or ATM cell HCS
byte(s) are not passed to the RXSDQ FIFO. When STRIP is disabled the received packet
FCS are transferred over the FIFO interface. When DELINDIS is enabled, packets and cells
are not delineated therefore the value of STRIP_SEL is ignored. The STRIP_SEL bit must
be set to logic 1 if working in ATM mode.
INVERT:
The data inversion bit (INVERT) configures the processor to logically invert the incoming
stream before processing it. When INVERT is set to logic 1, the stream is logically inverted
before processing. When INVERT is set to logic 0, the stream is not inverted before
processing.
POS_SEL:
The Packet Over SONET (POS_SEL) bit selects the data type mode of the RCFP. When
POS_SEL is logic 1, POS mode is selected. When POS_SEL is logic 0, ATM mode is
selected.
Reserved:
All Reserved bits must be set to their default values for proper operation.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
309
PMC [ PMC-SIERRA, INC ]
