PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0137H: RTTP SECTION Trace Mismatch Interrupt Status
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
Unused
Unused
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
TIMI[1]
R
R
R
R
R
R
R
R
R
R
R
R
X
X
X
X
X
X
X
X
X
X
X
X
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TIMI[1]:
The trace identifier mismatch interrupt status (TIMI[1]) bit is an event indicator. TIMI[1] is set
to logic 1 to indicate any changes in the status of TIMV[1] (match to mismatch, mismatch to
match). This interrupt status bit is independent of the interrupt enable bit. TIMI[1] is cleared
to logic 0 when this register is read.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
189