PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 000DH: APS Output TeleCombus Synchronization Delay
Bit
Type
Function
Default
Bit 15
Unused
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AOJ0REFDLY[13]
AOJ0REFDLY[12]
AOJ0REFDLY[11]
AOJ0REFDLY[10]
AOJ0REFDLY[9]
AOJ0REFDLY[8]
AOJ0REFDLY[7]
AOJ0REFDLY[6]
AOJ0REFDLY[5]
AOJ0REFDLY[4]
AOJ0REFDLY[3]
AOJ0REFDLY[2]
AOJ0REFDLY[1]
AOJ0REFDLY[0]
This register controls the delay from the APSIFP input signal to the time when the S/UNI-2488
produces the J0 pulse on the APS Output serial data links (APSO+/-[4:1]).
AOJ0REFDLY[13:0]:
The APS Output transport frame delay bits (AOJ0REFDLY [13:0]) control the delay, in
REFCLK cycles, inserted by the S/UNI-2488 between receiving a reference J0 frame pulse
on APSIFP, and presenting the outgoing J0 character on APSO+/-[4:1]. The relationships of
APSIFP, AOJ0REFDLY [13:0] and the system configuration are described in the Functional
Timing section.
Valid values of AOJ0REFDLY [13:0] are 0000H to 25F7H.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
115