S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
9.6
9.7
9.8
9.9
Receive ATM (UTOPIA) and Packet over SONET/SDH (POS) System Interface.... 52
Microprocessor Interface Signals.............................................................................. 56
JTAG Test Access Port (TAP) Signals....................................................................... 57
Analog Signals .......................................................................................................... 58
9.10 Power and Ground .................................................................................................... 58
9.11 No Connects.............................................................................................................. 63
10 Functional Description .......................................................................................................... 66
10.1 Receive Line Interface (CRSI) .................................................................................. 66
10.2 Receive Section Overhead Processor (RSOP) ........................................................ 67
10.3 Receive Line Overhead Processor (RLOP).............................................................. 69
10.4 The Receive APS, Synchronization Extractor and Bit Error Monitor (RASE) ........... 71
10.5 Receive Path Overhead Processor (RPOP)............................................................. 71
10.6 Receive ATM Cell Processor (RXCP) ....................................................................... 75
10.7 Receive POS Frame Processor (RXFP)................................................................... 77
10.8 Transmit Line Interface (CSPI).................................................................................. 79
10.9 Transmit Section Overhead Processor (TSOP)........................................................ 80
10.10 Transmit Line Overhead Processor (TLOP).............................................................. 81
10.11 Transmit Path Overhead Processor (TPOP)............................................................. 82
10.12 Transmit ATM Cell Processor (TXCP)....................................................................... 83
10.13 Transmit POS Frame Processor (TXFP) .................................................................. 83
10.14 SONET/SDH Path Trace Buffer (SPTB) ................................................................... 86
10.15 SONET/SDH Section Trace Buffer (SSTB)............................................................... 88
10.16 WAN Synchronization Controller (WANS)................................................................. 89
10.17 ATM UTOPIA and Packet over SONET/SDH POS-PHY System Interfaces ............ 91
10.18 Transmit APS Interface ............................................................................................. 93
10.19 Transmit APS Overhead Processor .......................................................................... 93
10.20 SONET/SDH Path Aligner......................................................................................... 94
10.21 Receive APS Interface .............................................................................................. 94
10.22 Receive APS Overhead Processor ........................................................................... 95
10.23 Channel Cross Connect............................................................................................ 97
10.24 JTAG Test Access Port.............................................................................................. 97
10.25 Microprocessor Interface........................................................................................... 97
11 Normal Mode Register Descriptions..................................................................................... 98
11.1 Register Memory Map............................................................................................... 98
11.2 Registers ..................................................................................................................111
12 Test Features Description ................................................................................................... 368
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
6
PMC [ PMC-SIERRA, INC ]
