S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x00C, 0x10C, 0x20C, 0x30C, 0x40C, 0x50C, 0x60C, 0x70C:
Channel Received Line AIS Control
Bit
Type
R/W
R/W
R/W
R/W
R/W
R/W
Function
SDINS
SFINS
LOFINS
LOSINS
RTIMINS
RTIUINS
Unused
DCCAIS
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
1
1
0
0
X
0
R/W
This register controls the auto assertion of the receive line AIS for the entire SONET/SDH
stream.
DCCAIS:
The DCCAIS bit enables the insertion of all ones in the section DCC (and the line DCC
when loss of frame (LOF) or LOS is declared. When DCCAIS is a logic one, all ones is
inserted in RDCC/RACC outputs when LOF or LOS is declared.
RTIUINS:
The RTIUINS bit enables the insertion of path AIS in the receive direction upon the
declaration of section trace unstable. If RTIUINS is a logic one, path AIS is inserted into
the SONET/SDH frame when the current received section trace identifier message has not
matched the previous message for eight consecutive messages. Path AIS is terminated
when the current message becomes the accepted message.
RTIMINS:
The RTIMINS bit enables the insertion of path AIS in the receive direction upon the
declaration of section trace mismatch. If RTIMINS is a logic one, path AIS is inserted into
the SONET/SDH frame when the accepted identifier message differs from the expected
message. Path AIS is terminated when the accepted message matches the expected
message.
LOSINS:
The LOSINS bit enables the insertion of path AIS in the receive direction upon the
declaration of loss of signal (LOS). If LOSINS is a logic one, path AIS is inserted into the
SONET/SDH frame when LOS is declared. Path AIS is terminated when LOS is removed.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
135
PMC [ PMC-SIERRA, INC ]
