S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x00B, 0x10B, 0x20B, 0x30B, 0x40B, 0x50B, 0x60B, 0x70B:
Channel Receive RDI and Enhanced RDI Control
Bit
Type
R/W
R/W
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PAISCONPRDI
NOPAISCONEPRDI
Unused
Unused
Unused
EPRDI_EN
UNEQPRDI
UNEQEPRDI
0
0
X
X
X
0
1
1
R/W
R/W
R/W
This register along with the Enhanced Path RDI Control register controls the auto assertion of
path RDI (G1 bit 5, 6 and 7) in the TPOP for the entire SONET/SDH stream. For more details
refer to the Operation Section of this document.
UNEQEPRDI:
When set high, the UNEQEPRDI bit enables enhanced path RDI assertion when the path
signal label in the receive stream indicates unequipped status. When UNEQEPRDI is set
high and the path signal label indicates unequipped, bit 6 of the G1 byte is set high while bit
7 of the G1 byte is set low.
When UNEQEPRDI is set low, path signal label unequipped status has no effect on
enhanced path RDI.
UNEQPRDI:
When set high, the UNEQPRDI bit enables path RDI assertion when the path signal label in
the receive stream indicates unequipped status. When UNEQPRDI is set low, the path
signal label unequipped status has no effect on path RDI.
EPRDI_EN:
The EPRDI_EN bit enables the automatic insertion of enhanced RDI in the local
transmitter. When EPRDI_EN is a logic one, auto insertion is enabled using the event
enable bits in this register. When EPRDI_EN is a logic zero, enhanced path RDI is not
automatically inserted in the transmit stream.
The EPRDIEN and EPRDISRC in register offset 0x040 must also be set to enable enhanced
RDI.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
133
PMC [ PMC-SIERRA, INC ]
