STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
jitter frequencies above 9 Hz. For jitter frequencies below 9 Hz, more correctly
called wander, the tolerance increases 20 dB per decade. In most applications
the each DJAT Block will limit jitter tolerance at lower jitter frequencies only. For
high frequency jitter, above 10 kHz for example, other factors such as clock and
data recovery circuitry may limit jitter tolerance and must be considered. For low
frequency wander, below 10 Hz for example, other factors such as slip buffer
hysteresis may limit wander tolerance and must be considered. The DJAT
blocks meet the stringent low frequency jitter tolerance requirements of AT&T TR
62411, ITU-T Recommendation G.823 and thus allow compliance with this
standard and the other less stringent jitter tolerance standards cited in the
references.
The DJAT exhibits negligible jitter gain for jitter frequencies below 6.6 Hz, and
attenuates jitter at frequencies above 6.6 Hz by 20 dB per decade in T1 mode. It
exhibits negligible jitter gain for jitter frequencies below 8.8 Hz, and attenuates
jitter at frequencies above 8.8 Hz by 20 dB per decade in E1 mode. In most
applications the DJAT Blocks will determine jitter attenuation for higher jitter
frequencies only. Wander, below 10 Hz for example, will essentially be passed
unattenuated through DJAT. Jitter, above 10 Hz for example, will be attenuated
as specified, however, outgoing jitter may be dominated by the generated
residual jitter in cases where incoming jitter is insignificant. This generated
residual jitter is directly related to the use of 24X (37.056 MHz or 49.152 MHz)
digital phase locked loop for transmit clock generation. DJAT meets the jitter
transfer requirements of AT&T TR 62411. The DJAT allows the implied T1 jitter
attenuation requirements for a TE or NT1 given in ANSI Standard T1.408, and
the implied jitter attenuation requirements for a type II customer interface given in
ANSI T1.403 to be met. The DJAT meets the E1 jitter attenuation requirements
of the ITU-T Recommendations G.737, G.738, G.739 and G.742.
Jitter Tolerance
Jitter tolerance is the maximum input phase jitter at a given jitter frequency that a
device can accept without exceeding its linear operating range, or corrupting
data. For T1 modes the DJAT input jitter tolerance is 29 Unit Intervals peak-to-
peak (UIpp) with a worst case frequency offset of 354 Hz. For E1 modes the
input jitter tolerance is 35 Unit Intervals peak-to-peak (UIpp) with a worst case
frequency offset of 308 Hz. In either mode jitter tolerance is 48 UIpp with no
frequency offset. The frequency offset is the difference between the frequency
of XCLK divided by 24 and that of the input data clock.
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
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PMC [ PMC-SIERRA, INC ]
