PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Pin Name
Type
Pin
No.
Function
register bit is set high. When AU3/TUG3 bypass
is enabled (TUGEN set low or TUGBYP set
high), the J1 and V1 byte position pulses are
delayed versions from the IC1J1[1] input.
OC1J1V1[1] is updated on the rising edge of
HSCLK.
OC1J1V1[2] Output F21
The outgoing composite frame pulse #2
(OC1J1V1[2]) marks the transport, synchronous
payload envelope and tributary multiframe frame
boundaries on the outgoing STM-1 #2 stream.
In outgoing STM-1 (STS-3) interface mode
(OHSMODEB set high), OC1J1V1[2] pulses
high to mark the first C1 byte of the STM-1 #2
transport envelope frame on the OD[15:8] bus. It
also pulses high to mark the J1 byte(s). When
AU3/TUG3 bypass is disabled (TUGEN set high
and TUGBYP set low), the AU3/AU4 pointer
offset (J1 position relative to C1) is determined
by the corresponding STP Outgoing Pointer
MSB and LSB registers. Optionally, OC1J1V1[2]
also marks the third byte after J1 of the first
tributary in each STS-1 (TUG3) stream when the
corresponding OV1EN register bit is set high.
When AU3/TUG3 bypass is enabled (TUGEN
set low or TUGBYP set high), the J1 and V1
byte position pulses are delayed versions from
the IC1J1[2] input. OC1J1V1[2] is updated on
the rising edge of SCLK.
In outgoing STM-4 (STS-12) interface mode
(OHSMODEB set low), OC1J1V1[2] is invalid.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
68
PMC [ PMC-SIERRA, INC ]
