PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
11.2 VTPP #1, VTPP #2 AND VTPP #3 REGISTERS ....................169
11.3 RTOP #1, RTOP #2 AND RTOP #3 REGISTERS ...................205
11.4 RTTB #1, RTTB #2 AND RTTB #3 REGISTERS.....................298
TEST FEATURES DESCRIPTION.....................................................325
12.1 I/O TEST MODE......................................................................332
12.2 JTAG TEST PORT ..................................................................364
OPERATION ......................................................................................376
13.1 CONFIGURATION OPTIONS .................................................376
13.2 STS-1 MODE ..........................................................................378
13.3 AU3 MODE..............................................................................378
13.4 AU4 MODE..............................................................................379
13.5 BYPASS OPTIONS.................................................................381
13.6 POWER SEQUENCING..........................................................382
13.7 JTAG SUPPORT .....................................................................382
13.7.1 TAP CONTROLLER .....................................................384
13.7.2 BOUNDARY SCAN INSTRUCTIONS...........................387
FUNCTIONAL TIMING.......................................................................389
ABSOLUTE MAXIMUM RATINGS.....................................................408
D.C. CHARACTERISTICS.................................................................409
12
13
14
15
16
17
MICROPROCESSOR INTERFACE TIMING
CHARACTERISTICS .........................................................................412
18
TUPP+622 TIMING CHARACTERISTICS .........................................420
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
iii