PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Test Register 3804H: (Read in I/O test mode)
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
Reserved
Reserved
Reserved
ITV5[4]
ITPL[4]
IAIS[4]
X
X
X
X
X
X
X
X
Reserved
Reserved
12.2 JTAG Test Port
The TUPP+622 JTAG Test Access Port (TAP) allows access to the TAP controller
and the 4 TAP registers: instruction, bypass, device identification and boundary
scan. Using the TAP, device input logic levels can be read, device outputs can be
forced, the device can be identified and the device scan path can be bypassed.
For more details on the JTAG port, please refer to the Operation section.
Table 4
- Instruction Register (Length – 3 bits)
Instructions
Selected Register
Instruction Codes, IR[2:0]
EXTEST
IDCODE
SAMPLE
BYPASS
BYPASS
STCTEST
BYPASS
BYPASS
Boundary Scan
Identification
Boundary Scan
Bypass
Bypass
Boundary Scan
Bypass
000
001
010
011
100
101
110
111
Bypass
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
364
PMC [ PMC-SIERRA, INC ]
