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PM5363-BI 参数 Datasheet PDF下载

PM5363-BI图片预览
型号: PM5363-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH支路单元荷载处理器, 622兆比特/ s接口 [SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 459 页 / 3435 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM5363 TUPP+622  
TUPP+622  
DATASHEET  
PMC-1981421  
ISSUE 4  
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S  
INTERFACES  
Register 142H, 14AH, 152H, 15AH, 162H, 16AH, 172H:  
Register 242H, 24AH, 252H, 25AH, 262H, 26AH, 272H:  
Register 342H, 34AH, 352H, 35AH, 362H, 36AH, 372H:  
RTOP, TU #2 in TUG2 #1 to TUG2 #7, Expected Path Signal Label  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Unused  
Unused  
Unused  
Unused  
Unused  
EPSL[2]  
EPSL[1]  
EPSL[0]  
X
X
X
X
X
0
R/W  
R/W  
R/W  
0
0
This set of registers configures the expected path signal label of TU #2 in TUG2  
#1 to TUG2 #7. These registers have no effect in TU3 mode. When the  
corresponding TUG2 tributary group is configured to TU2 (VT6) mode, the  
associated register in this set has no effect.  
EPSL[2:0]:  
The EPSL[2:0] bits specifies the expected path signal label of tributary TU #2  
in the corresponding TUG2. The expected PSL is compared with the accepted  
PSL to determine the PSLM state.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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