PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Pin Name
Type
Pin
Function
No.
A[0]
A[1]
Input
D8
B7
The address bus A[13:0] selects specific
registers during TUPP+622 register accesses.
A[2]
C8
A[3]
A7
A[4]
B8
A[5]
C9
A[6]
B9
A[7]
A[8]
D10
A9
A[9]
C10
B10
A10
D11
C11
A[10]
A[11]
A[12]
A[13]/TRS
The test register select (TRS) signal selects
between normal and test mode register
accesses. TRS is high during test mode register
accesses, and is low during normal mode
register accesses.
RSTB
ALE
Input
Input
D7
A5
The active low reset (RSTB) signal provides an
asynchronous TUPP+622 reset. RSTB is a
Schmitt triggered input with an integral pull up
resistor.
The address latch enable (ALE) is active high
and latches the address bus A[13:0] when low.
When ALE is high, the internal address latches
are transparent. It allows the TUPP+622 to
interface to a multiplexed address/data bus. ALE
has an integral pull up resistor.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
82
PMC [ PMC-SIERRA, INC ]
