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PM5356-BI 参数 Datasheet PDF下载

PM5356-BI图片预览
型号: PM5356-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM Network Interface, 1-Func, CMOS, PBGA304, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 278 页 / 1562 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PM5356  
S/UNI-622-MAX  
DATASHEET  
S/UNI-622-MAX  
PMC-1980589  
ISSUE 5  
SATURN USER NETWORK INTERFACE (622-MAX)  
APSFEBE  
The APSFEBE bit controls the overwriting of the transmit path FEBE values. When  
APSFEBE is set high, the FEBE information on the APS[4:0] pins is transmitted by TPOP.  
When APSFEBE is set low, the FEBE information from RPOP is transmitted by TPOP. The  
APSOE bit must be set low when APSFEBE is set high.  
APSI:  
The APS FIFO interrupt indicates if the APS FIFO has underrun or overrun. The APSI  
register is set high when a FIFO underrun or overrun has occurred since the register was last  
read. The APSI register is set low when the register is read. This interrupt register should be  
periodically polled to ensure the APS FIFO is operating normally when configured for 1+1  
APS operation.  
APSFRST:  
The APS FIFO Reset bit controls the four-byte FIFO which handles minor phase variations  
between the parallel input clock PTCLK and the transmit clock TCLK. When APSFRST is set  
high, the FIFO is held in reset. When APSFRST is set low, the FIFO may be reset during  
system reset. The APSFRST should be set high for at least 4 TCLK cycles when either  
S/UNI-622-MAX devices in the 1+1 APS configuration are reset.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERSINTERNAL USE  
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