PMC-Sierra, Inc.
PM5356
S/UNI-622-MAX
DATASHEET
S/UNI-622-MAX
PMC-1980589
ISSUE 5
SATURN USER NETWORK INTERFACE (622-MAX)
Register 0x40: TPOP Control/Diagnostic
Bit
Bit 7
Type
Function
Default
Unused
EPRDIEN
EPRDISRC
PERSIST
Reserved
Reserved
DBIP8
X
0
0
0
0
0
0
0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PAIS
PAIS:
The PAIS bit controls the insertion of STS path alarm indication signal. When a logic one is
written to this bit position, the complete SPE, and the pointer bytes (H1, H2, and H3) are
overwritten with the all-ones pattern. When a logic zero is written to this bit position, the
pointer bytes and the SPE are processed normally.
DBIP8:
The DBIP8 bit controls the insertion of bit errors continuously in the B3 byte. When DBIP8 is
a logic one, the B3 byte is inverted.
PERSIST
The path far end receive failure alarm persistence bit (PERSIST) controls the persistence of
the RDI asserted into the transmit stream. When PERSIST is a logic one, the RDI code
inserted into the transmit stream as a result of consequential actions is asserted for a
minimum of 20 frames in non-enhanced RDI mode, or the last valid RDI code before an idle
code (idle codes are when bits 5,6,7 are 000, 001, or 011) is asserted for 20 frames in
enhanced RDI mode. When PERSIST is logic zero, the transmit RDI code changes
immediately based on received alarm conditions.
EPRDISRC
The enhanced path receive defect indication alarm source bit (EPRDISRC) controls the
source of RDI input to be inserted onto the G1 byte. When EPRDIEN is logic zero, the
extended RDI bits of the G1 byte not overwritten by the TPOP block, regardless of
EPRDISRC. When EPRDIEN is logic one and EPRDISCR is logic zero, the extended RDI
bits of the G1 byte, bits 6 and 7, are inserted according to the value in the G1[1:0] register
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
135
PMC [ PMC-SIERRA, INC ]
