PMC-Sierra, Inc.
S/UNI-QUAD
DATASHEET
PMC-971239
ISSUE 6
PM5349 S/UNI-QUAD
SATURN USER NETWORK INTERFACE (155-QUAD)
CONTENTS
1
FEATURES ........................................................................................................................1
1.1
1.2
1.3
1.4
1.5
2
3
4
5
6
7
8
9
GENERAL.............................................................................................................1
THE SONET RECEIVER......................................................................................1
THE RECEIVE ATM PROCESSOR......................................................................2
THE SONET TRANSMITTER...............................................................................2
THE TRANSMIT ATM PROCESSOR ...................................................................3
APPLICATIONS .................................................................................................................4
REFERENCES ..................................................................................................................5
DEFINITIONS ....................................................................................................................6
APPLICATION EXAMPLES ...............................................................................................7
BLOCK DIAGRAM .............................................................................................................8
DESCRIPTION ..................................................................................................................9
PIN DIAGRAM .................................................................................................................11
PIN DESCRIPTION .........................................................................................................12
9.1
9.2
9.3
9.4
9.5
9.6
LINE SIDE INTERFACE SIGNALS ....................................................................12
UTOPIA LEVEL 2 SYSTEM INTERFACE ..........................................................15
MICROPROCESSOR INTERFACE SIGNALS ...................................................23
JTAG TEST ACCESS PORT (TAP) SIGNALS ....................................................25
ANALOG SIGNALS ............................................................................................26
POWER AND GROUND.....................................................................................26
10
FUNCTIONAL DESCRIPTION ........................................................................................32
10.1
RECEIVE LINE INTERFACE (CRSI) ..................................................................32
10.1.1
10.1.2
10.2
CLOCK RECOVERY.......................................................................32
SERIAL TO PARALLEL CONVERTER ...........................................33
RECEIVE SECTION OVERHEAD PROCESSOR (RSOP) ................................33
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
FRAMER .........................................................................................33
DESCRAMBLE................................................................................34
ERROR MONITOR..........................................................................34
LOSS OF SIGNAL ..........................................................................34
LOSS OF FRAME ...........................................................................35
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I
PMC [ PMC-SIERRA, INC ]
