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PM49FL002T-33JCE 参数 Datasheet PDF下载

PM49FL002T-33JCE图片预览
型号: PM49FL002T-33JCE
PDF下载: 下载PDF文件 查看货源
内容描述: 2兆位/ 4兆位3.3伏,只有固件集线器/ LPC闪存 [2 Mbit / 4 Mbit 3.3 Volt-only Firmware Hub/LPC Flash Memory]
分类和应用: 闪存内存集成电路PC
文件页数/大小: 46 页 / 208 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM49FL002T-33JCE的Datasheet PDF文件第9页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第10页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第11页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第12页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第14页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第15页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第16页浏览型号PM49FL002T-33JCE的Datasheet PDF文件第17页  
Pm49FL002 / 004  
PMC  
FWH SECTOR ERASE WAVEFORMS  
CLK  
RST# or INIT#  
F W H 4  
Memory  
Address  
0101b  
Data  
1010b  
TAR  
RSYNC  
0000b  
TAR  
Write Cycle IDSEL  
IMSIZE  
0000b  
1010b  
Clock Load "AAh" in  
2 Clocks  
1111b  
2
1111b  
1110b  
Clock  
ID[3:0]  
Clock  
xxxxb  
0101b  
Clocks  
0101b  
0101b  
Tri-State  
Clocks  
Tri-State  
xxxxb  
x1xxb  
FWH[3:0]  
CLK  
1
Clock  
2
Clocks  
1
1
Load "5555h" in  
7
7
7
1
Host to Device  
Device to Host  
RST# or INIT#  
F W H 4  
Address  
0010b  
Load "2AAAh" in  
Data  
0101b 0101b  
TAR  
RSYNC  
0000b  
TAR  
1111b  
Tri-State  
2nd Start IDSEL  
IMSIZE  
xxxxb  
x1xxb  
1010b  
1110b  
Clock  
ID[3:0]  
Clock  
xxxxb  
1010b  
Clocks  
1010b  
0000b  
Clock  
1111b  
2
Tri-State  
Clocks  
FWH[3:0]  
CLK  
1
Clock  
2
Clocks  
1
1
1
Load "55h" in  
2
Clocks  
Host to Device  
Device to Host  
RST# or INIT#  
F W H 4  
Address  
0101b  
Load "5555h" in  
Data  
TAR  
Tri-State  
Clocks  
RSYNC  
0000b  
TAR  
1111b Tri-State  
3rd Start  
1110b  
IMSIZE  
0000b  
IDSEL  
ID[3:0]  
xxxxb  
x1xxb  
0000b  
1000b  
1111b  
2
xxxxb  
0101b  
Clocks  
0101b  
0101b  
FWH[3:0]  
1
Clock  
2
Clocks  
1
Clock  
1
Clock  
1
Clock Load "80h" in  
2
Clocks  
Host to Device  
Device to Host  
CLK  
RST# or INIT#  
F W H 4  
Address  
0101b  
0101b  
Load "5555" in 7 Clocks  
IMSIZE  
0000b  
Clock Load "AAh" in  
Data  
TAR  
RSYNC  
0000b  
TAR  
1111b  
Tri-State  
4th Start  
1110b  
IDSEL  
ID[3:0]  
xxxxb  
xxxxb  
xxxxb  
x1xxb  
x1xxb  
x1xxb  
0101b  
0101b  
0101b  
1010b  
xxxxb  
1111b  
2
Tri-State  
Clocks  
FWH[3:0]  
1
Clock  
2
Clocks  
1
Clock  
1
1
1
Clock  
1
2
Clocks  
Host to Device  
Device to Host  
CLK  
RST# or INIT#  
F W H 4  
Address  
0010b  
Load "2AAAh" in 7  
IMSIZE  
0000b  
Clock Load "55h" in  
Data  
TAR  
Tri-State  
Clocks  
RSYNC  
0000b  
TAR  
1111b Tri-State  
5th Start  
1110b  
IDSEL  
ID[3:0]  
0101b  
0101b  
1111b  
2
xxxxb  
0010b  
Clocks  
1010b  
1010b  
FWH[3:0]  
CLK  
1
Clock  
2
Clocks  
1
Clock  
Clock  
1
2
Clocks  
Host to Device  
Device to Host  
RST# or INIT#  
F W H 4  
Internal Erase  
Start  
IMSIZE  
0000b  
Address  
SA[19:16]  
Data  
TAR  
RSYNC  
0000b  
TAR  
IDSEL  
ID[3:0]  
6th Start  
1110b  
SA[15:12]  
xxxxb  
0000b  
0011b  
xxxxb  
1111b  
2
1111b  
Tri-State  
xxxxb  
Load Sector Address in  
SA  
Tri-State  
Clocks  
FWH[3:0]  
1
Clock  
2
Clocks  
1
Clock  
Clock  
7
Clocks  
Host to Device  
1
Clock Load "30h" in 2 Clocks  
Device to Host  
=
Sector Address  
Issue Date: December, 2003 Rev: 1.4  
Programmable Microelectronics Corp.  
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